Lok-Won Kim and John Villasenor, “Dynamic Function Replacement for System-on-Chip Security in the Presence of Hardware-Based Attacks,” IEEE Transactions on Reliability, Vol. 63, No. 2, pp. 661-675, June 2014.
Przemyslaw Pawelczak, Shaunak Joshi, Sateesh Addepalli, John Villasenor, Danijela Cabric, “Impact of the Connection Admission Process on the Direct Retry Load Balancing Algorithm in Cellular Networks,” IEEE Transactions on Mobile Computing, Vol. 12, No. 9, pp. 1681-1696, September 2013.
Jianwen Chen, Jason Cong, Luminita A. Vese, John Villasenor, Ming Yan, and Yi Zou, “A Hybrid Architecture for Compressive Sensing 3D CT Reconstruction,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Special Issue: Circuits, Systems and Algorithms for Compressive Sensing, Vol. 2, No. 3, pp. 616-625, Oct. 2012.
Jianwen Chen, Jianhua Zheng, Feng Xu, and John Villasenor, “Adaptive Frequency Weighting for High-Performance Video Coding,” IEEE Transactions on Circuits and Systems for Video Technology, Vol. 22, No. 7, pp. 1027-1036, July 2012.
Christopher Bronk, Cody Monk & John Villasenor, “The Dark Side of Cyber Finance,” Survival: Global Politics and Strategy, Vol. 54, No. 2, pp. 129-142, April-May 2012.
Weidong Hu, Jiangtao Wen, Weiyi Wu, Yuxing Han, Shiqiang Yang, and John Villasenor, “Highly Scalable Parallel Arithmetic Coding on Muti-Core Processors using LDPC Codes,” IEEE Transactions on Communications, Vol. 60, No. 2, pp. 289-194, February 2012.
Jianwen Chen, Feng Xu, Yun He, John Villasenor, Yuxing Han, Yan Xu, Yaocheng Rong, Cliff Reader, and Jiangtao Wen, “Efficient Video Coding Using Legacy Algorithmic Approaches,” IEEE Transactions on Multimedia, Vol. 14, No. 1, pp. 111-120, February, 2012.
Dong-U Lee, Lok-Won Kim, and John Villasenor, “Precision-Aware, Self-Quantizing Hardware Architectures for the Discrete Wavelet Transform,” IEEE Transactions on Image Processing, Vol. 21, No. 2, pages 768-777, February 2012.
Yuxing Han, Jiangtao Wen, Danijela Cabric and John Villasenor, “Probabilistic Estimation of the Number of Frequency-Hopping Transmitters,” accepted for publication in IEEE Transactions on Wireless Communications, Vol. 10, No. 10, pp. 3232-3240, October 2011.
Lok-Won Kim, and John D. Villasenor, “A System-On-Chip Bus Architecture for Thwarting Integrated Circuit Trojan Horses,” IEEE Transactions on VLSI Systems, Vol. 19, No. 10, pp. 1921-1926, October 2011.
Yuxing Han, Jiangtao Wen, Danijela Cabric and John Villasenor, “Using a Vector of Observations to Identify the Number of Frequency-Hopping Transmitters,” IEEE Communications Letters, Vol. 15, No. 3, pp. 299 – 301, March 2011.